Job Description

　　Do Something Wonderful!

　　Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

　　Who We Are

　　Come join Intel's IP Engineering Group (IPG) which is part of the Design Engineering Group (DEG). IPG's Test Chip Engineering team is chartered with transforming Intel and DEG/IPG with silicon-proven test-chips for leading-edge IPs and technologies.

　　Who You Are

　　You will be responsible for, but not limited to:

　　This leader will manage pre-Silicon project management of multiple Test Chips for PPA/Technology co-optimization, Foundational IPs, Complex IP Sub-systems in support of IP and Technology certification ahead of product intercept for internal IPG customers as well as support external customers in partnership with Intel Foundry Services (IFS).Responsibility includes working closely with IP teams, test-chip teams, and post-silicon partners to plan, develop, monitor and actively manage test-chip program IP POR, schedule, deliverables/receivables as well as partner with Technology Development (TD), Product Enablement Solutions Group (PESG), post-Silicon teams to pro-actively manage pre-Silicon development dependencies. Working with IP and Test-chip design team to developed detailed high/mid/low-level project schedules, identifying, and optimizing critical path, actively managing and tracking dependencies to deliver multiple test-chips programs predictably and with quality. Identifying gaps with pre and post-silicon teams across the 12-18 month roadmap time horizon. Work with key stakeholders to mitigate or work-around resourcing or funding gaps to insure test chip silicon meets the needs of the IP and product teams. In addition to the qualifications listed below the ideal candidate will also have; Highly effective in managing multiple programs concurrently with unique goals, schedule/issues and teams. Detail orientation and ability to gather, analyze and interpret data to drive results. Strong self-initiative and persistence, ability to deal with a high degree of ambiguity and drive clarity in key areas. Strong communication and presentation skills and ability to handle high degrees of task and deadline pressure. Drive retrospectives and continuous improvements. The position requires strong analytical, project management, and business partnering/influencing skills. The ideal candidate must have experience driving cross-organizational issues and projects to resolution, excellent written and communications skills, and a good understanding of Intel's highly complex products, technologies, and business strategies.

　　Qualifications

　　You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

　　Minimum Qualifications:

　　8+ years of experience as program manager for IP/SoC design execution, familiarity with Pre-Silicon Design front-end and back-end flows and related issues.

　　5+ years of program management experience across multi-disciplinary cross-organizational programs with a strong track record of delivering multiple IPs and SoCs product.

　　Strong working knowledge of IP/SoC PLC and familiarity with milestones/guidelines (PC, EC etc.).Knowledge and familiarity with post silicon flows and related issues.

　　Successful candidate will require ability to create and manage PLC management tools as well as ability to initiate and complete Internal and External IP/SoC contracts, forecast/manage compute resources needed to execute multiple projects.

　　Preferred Qualifications:

　　BS/MS in Electrical Engineering, Computer Science or semiconductor related majors.

　　Knowledge of Foundational IPs and Complex Analog Mixed-Signal IPs, HSIO, Memory Sub-system.

　　A combination of business acumen, organization savvy, networking capabilities, and expertise to get results across multiple groups and disciplines.

　　Inside this Business Group

　　IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.

　　Other Locations

　　US, OR, Hillsboro; US, TX, Austin; US, AZ, Phoenix; US, CA, Santa Clara

　　Posting Statement

　　All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

　　Benefits

　　We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

　　Annual Salary Range for jobs which could be performed in US, California: $141,673.00-$241,005.00

　　*Salary range dependent on a number of factors including location and experience

　　Working Model

　　This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.