Minimum qualifications:

　　Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience. 10 years of experience in leading verification of IPs, Subsystems and SoCs.

　　Experience in creating detailed SoC design verification strategies and plans.

　　Preferred qualifications: Experience working with CPU, GPU, and memory subsystems.

　　Experience using HVL, System Verilog or C/C++ for SoC or subsystem verification.

　　Experience with RTL, UPF, GLS and formal verification techniques.

　　Experience with low power, debug, performance verification and use cases verification.

　　About the job

　　Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

　　With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.

　　Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

　　Responsibilities

　　Work with design verification and other stakeholders to come up with detailed execution plans, schedule, dependencies and deliverables. Plan the verification of digital design blocks, understand the design specification and interact with architecture and design engineers to identify important verification scenarios. Work closely with system, software, design, dft and physical implementation stakeholders to make technical decisions. Set the goal and own IP verification methodology.

　　Identify key coverage measures for stimulus and corner-cases. Close coverage measures to identify verification holes and show progress towards tape-out.