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Lead Software Engineer ( Verification )
Lead Software Engineer ( Verification )-March 2024
Ahmedabad
Mar 21, 2025
ABOUT CADENCE
Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design™ strategy t
5,001 - 10,000 employees
Technology
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About Lead Software Engineer ( Verification )

  At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

  Job Title: Lead Software Engineer

  Location: Ahmedabad

  Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world's most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

  The Cadence Advantage

  The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.Cadence's employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.The unique "One Cadence - One Team" culture promotes collaboration within and across teams to ensure customer successMultiple avenues of learning and development available for employees to explore as per their specific requirement and interestsYou get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other-every day.

  Job Summary

  This position requires the development of Verification IPs for various standards specifications.

  • Developing performance optimized VIPs for latest (draft/ballot) specifications of various protocols and interfaces.

  • Verifying the VIPs for proper functionality and system scenarios (including erroneous conditions)

  • Developing test suite and compliance test suite for 100% functional coverage for a given specification.

  • Documenting the design and implementation for engineering details and for customers.

  • Interacting with internal and external customers and resolving issues in a timely manner.

  Job Responsibilities

  • Good working knowledge of various verification concepts such as Verification architecture, coverage, checkers, test plan etc.

  • Knowledge of Verification environments based on UVM, System Verilog

  • Should have participated in building IP/full chip verification environments, verification planning and closure process.

  • Domain expertise in AMBA models like AXI/ACE, AHB, APB, CHI etc.

  • Programming skills: C, Verilog, System Verilog mandatory. C++ would be a strong plus.

  • Very good debugging and analytical skills

  • Should have good communication skills and should be a good team player.

  Qualifications

  BE/BTech/ME/MS/MTech in Electrical/Electronics

  Experience and Technical Skills required

  4+ years of experience in Verification

  Expertise in one or more domains - UVM, System Verilog

  Behavioral skills required

  Must possess strong written, verbal and presentation skills.Ability to establish a close working relationship with both customer peers and management.Explore what's possible to get the job done, including creative use of unconventional solutions.Work effectively across functions and geographies.Push to raise the bar while always operating with integrity.

  Regards

  K Madhu Prasad (Madhu Reddy)

  Hiring Team M:: +91 9900054283

  www.cadence.com | 080 4184 1111 - 1045

  We're doing work that matters. Help us solve what others can't.

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