At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

　　Job Title: Lead Software Engineer (Verification)

　　Location: Ahmedabad / Bangalore

　　Email your profile to [email protected]

　　Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world's most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

　　The Cadence Advantage

　　The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.Cadence's employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.The unique "One Cadence - One Team" culture promotes collaboration within and across teams to ensure customer successMultiple avenues of learning and development available for employees to explore as per their specific requirement and interestsYou get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other-every day.

　　Job Summary

　　This position requires the validation of Verification IPs for various standards specifications.

　　• Verifying the VIPs for proper functionality and system scenarios (including erroneous conditions)

　　• Developing test suite and compliance test suite for 100% functional coverage for a given specification.

　　• Documenting the verification plan and tracking it to closure.

　　• Interacting with internal and external customers and resolving issues in a timely manner.

　　Job Responsibilities

　　• Candidate will be responsible for validation of PCIe Verification IP.

　　• Good working knowledge of various verification concepts such as Verification architecture, coverage, checkers, test plan etc.

　　• Knowledge of Verification environments based on UVM, System Verilog

　　• Should have participated in building IP/full chip verification environments, verification planning and closure process.

　　• Should be able to work with multi-site and diverse team. Effectively collaborate with multi location development team to contribute in PCIe Verification IP development, milestones technical roadmap for success.

　　• Domain expertise in PCIe, CXL, USB, MIPI, AMBA, NVMe would be a strong plus

　　• Programming skills: Verilog, System Verilog mandatory. C, C++ would be a strong plus.

　　• Very good debugging and analytical skills

　　• Should have good communication skills and should be a good team player

　　Qualifications

　　BE/BTech/ME/MS/MTech in Electrical/Electronics

　　Experience and Technical Skills required

　　2+ years of experience in Verification

　　Expertise in one or more domains - UVM, System VerilogIn-depth understanding of complexity and advanced debugging techniques for proficiency in troubleshooting software issues and debugging a large codebase.Strong analytical and problem-solving skills with an ability to visualize processes and outcomes.

　　Behavioral skills required

　　Must possess strong written, verbal and presentation skillsAbility to establish a close working relationship with both customer peers and managementExplore what's possible to get the job done, including creative use of unconventional solutionsWork effectively across functions and geographiesPush to raise the bar while always operating with integrity

　　Regards

　　K Madhu Prasad (Madhu Reddy)

　　[email protected]

　　Hiring Team

　　www.cadence.com |

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