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ASIC Physical Design Senior Engineer
ASIC Physical Design Senior Engineer-November 2024
Virtual
Nov 2, 2024
ABOUT INTEL
Intel creates world-changing technology that enriches the lives of every person on earth.
10,000+ employees
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About ASIC Physical Design Senior Engineer

  Job Description

  If you have a strong technical background in ASIC Physical/Structural Design, would like to broaden your technical breadth into Tools/Flows/Methodology, this is the position for you. Intel Foundry Services (IFS) Design Solutions team is looking for independent, self-motivated candidates with strong technical skills in SOC/IP/ASIC design and/or methodology development to participate in our journey to bring IFS Design Platform to world class standard.

  As part of our IFS group, you will help validate and deliver a robust, fully validated reference design and sign off flows, in partnership with EDA vendors and other Intel/IFS Partner organizations. You will involve in building the design using the reference flows and continuously improve/update the design to exercise/stretch the flows in various metrics that matter most to our customers. You will help create documentation/trainings to bring our customers up-to-speed in using these flows along with Intel PDK collaterals. In addition, our team drives IFS technologies and solutions into our customer's engineering teams and is the customer advocate with internal development teams. You will ensure Intel collaterals and services can continuously meet IFS customers' needs that would lead to successful chip tape-outs. Joining this group means you will be representing Intel in enabling customers' satisfying experiences and eventual outcome, financial success.

  You will have an opportunity to learn and expand your knowledge on various ASIC physical design domains and will be exposed to various challenges that customers encounter. In this role you may:

  validate the overall IFS design platform based on vendor reference flows

  execute internal Test Chip design

  support the successful tape-out of customer chips

  create and deliver customer training and application notes

  provide technical support to IFS customers

  collaborate with internal teams and EDA vendors on issue resolution

  develop methodology and automation to improve design productivity and efficiency

  PDK and design collaterals validation, to name a few.

  #ifsdsgmy

  Qualifications

  Bachelor of Engineering degree or a Master of Science degree in Electronic, Electrical or Computer Engineering, or equivalent with preferably at least 5 years of experience in SOC/Analog/IP/ASIC design and/or methodology development.Preferred Qualifications:

  Minimum 3 years of experience in writing and producing software code using languages such as PERL and TCL.

  Minimum 5 years of experience in using Synthesis, Place and Route physical design tools and flow, with demonstrated experience in fixing timing, low power, IR drop, layout DRC violations, and successful tape-out of designs in advanced nodes.

  Experience in Unix/Linux and shell programming.

  Experience in 3DIC design will be an added advantage.

  Inside this Business Group

  Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first "Open System Foundry" model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient and sustainable source of supply.

  Posting Statement

  All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

  Benefits

  We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)

  Working Model

  This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

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