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ASIC Engineer, Design Verification
ASIC Engineer, Design Verification-March 2024
Sunnyvale
Mar 16, 2025
ABOUT META
We’re building a team as diverse as the communities and billions of people we serve every day. Our teammates don’t need to conform here. Lived experiences are an asset, and we value your unique perspe
10,000+ employees
Social Media, Technology
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About ASIC Engineer, Design Verification

  Summary:

  Meta Platforms, Inc. (Meta), formerly known as Facebook Inc., builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps and services like Messenger, Instagram, WhatsApp, and Novi further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. To apply, click “Apply to Job” online on this web page.

  Required Skills:

  ASIC Engineer, Design Verification Responsibilities:

  Define and implement IP/SoC verification plans, and build verification test benches to enable IP/sub-system/SoC level verification.

  Develop functional tests based on verification test plan.

  Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage.

  Debug, root-cause and resolve functional failures in the design, partnering with the Design team.

  Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality.

  Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry.

  Minimum Qualifications:

  Minimum Qualifications:

  Master's degree in Computer Science, Computer Engineering, or a related field and 36 months of experience in the job offered or in a computer-related occupation. Requires 36 months of experience involving the following

  Verilog, System Verilog, C/C++ based verification, and UVM methodology

  IP/sub-system or SoC level verification based on System Verilog UVM/OVM based methodologies

  SV Assertions, Formal, and Emulation

  Unix/Linux environments

  GPU architecture.

  Public Compensation:

  $169,540/year to $190,000/year + bonus + equity + benefits

  Industry: Internet

  Equal Opportunity:

  Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

  Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at [email protected].

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