Job Description
Do Something Wonderful
Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below.
Who We Are
Join Intel’s All Cores Engineering (ACE) Group as a Post Silicon Validation Engineer!
Our team delivers Intel’s industry leading P-Core IP solutions to our Xeon Server products for Data Center and Cloud customers.
Who You Are
Intel Architecture (IA) Core Post Silicon Validation Engineers are responsible for core level validation of the leading CPU products of each new Intel P-Core product. To bring these features and new platforms to market, a Core Post-Si Validation Engineer needs to be an expert in CPU Post-Si debug and validation, have knowledge in test generators for core level validation, be involved in tasks such as developing validation plans, 'powering on' the very first system built with Intel's latest and greatest CPU, validating product features, and identifying and debugging all functional bugs.
Our Engineers have great opportunities to enhance their skills in validation architecture and design. Various validation techniques are used, such as emulation, while offering a unique hardware-software experience.
In addition to various tools, languages and validation methodologies, Engineers will develop expertise with Intel Architecture and Micro Architecture and will be deeply involved in the process of defining new Intel features. They are independent, creative, with the willingness to innovate new solutions and demonstrate uncompromised quality in their work. Good communication and interaction skills among groups is also important.
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.
Minimum Qualifications:
The candidate should possess a Bachelor's degree in Electrical Engineering or other comparable degree with 2+ years of experience or Master's degree in Electrical Engineering or other comparable degree with 1+ years of experience.
Relevant experience should be concentrated in the follow areas:
C++ or Perl or Python
Platform Debug / Validation
Lab & Automation
Inside this Business Group
The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)
Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.